Reseachers Say SSDs Could Be Doomed To Failure

A graduate student speaking at the 10th Usenix Conference on File and Storage Technologies this week, said that as NAND flash densities increase, so do issues such as read and write latency and data errors. This is something we’ve known about for some time, but it appears that that many did not. Researchers tested 45 different NAND flash chips that ranged in size from 72 nanometer (nm) circuitry to 25nm technology. The chips came from six vendors and they found that program speed (write speed) for pages in a flash block suffered dramatic and predictable variations in latency. And, as the NAND flash wore out, error rates also varied widely between devices. Single-level cell (SLC) NAND held up the best in the tests, while multi-level cell (MLC), and in particular, triple-level cell (TLC) NAND, produced the worst results. The researchers took their empirical results and extrapolated them to the year 2024, when NAND flash development road maps show flash circuitry is expected to be only 6.5nm in size. At that time, read/write latency is expected to double in MLC flash and increase more than 2.5 times for TLC flash. In addition, bit error rates increased by a factor of more than three. The study paints a doom and gloom forecast, but it doesn’t take into consideration new technologies and advances in NAND Flash memory development. We are fairly certain that in the next 12 years, someone will make some improvements when it comes to these issues and correcting them.